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 Data Sheet, Rev 1.1, September 2009
TLE4998P3C
Programmable Linear Hall Sensor
Sensors
Never
stop
thinking.
Edition 2009-09 Published by Infineon Technologies AG, Am Campeon 1-12, 85579 Neubiberg, Germany
(c) Infineon Technologies AG 2009.
All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
TLE4998P3C
Revision History: Page 12 Page 14 Page 14 Page 25 General
2009-09
Rev 1.1
Previous Version: Data Sheet Rev 1.0 Table 4: Footnote 3) adapted Table 5: Sensitivity drift description adapted Table 5: Footnote 3) adapted Table 16: Footnote 1) and 2) adapted Package nomenclature changed to PG-SSO-3-92
We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to:
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TLE4998P3C
1 1.1 1.2 1.3 2 2.1 2.2 2.3 2.4 3 4 5
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Target Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Principle of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transfer Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 5 6 6 7 7 7 8 9
Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Electrical, Thermal and Magnetic Parameters . . . . . . . . . . . . . . . . . . . 12 Calculation of the Junction Temperature . . . . . . . . . . . . . . . . . . . . . . 14 Magnetic Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Signal Processing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Magnetic Field Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Magnetic Field Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gain Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Offset Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . DSP Input Low Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Clamping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PWM Output Fequency Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 16 16 17 18 18 19 21 23
6
6.1 6.2 6.3 6.4 6.5 6.6 7 7.1 7.2 8 8.1 9 9.1 9.2 9.3 9.4 10 11
Error Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Voltages Outside the Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 EEPROM Error Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Temperature Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Parameter Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Calibration Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Data transfer protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Programming of sensors with common supply lines . . . . . . . . . . . . . . . . . 27 28 29 29 29
Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Data Sheet
4
Rev 1.1, 2009-09
Programmable Linear Hall Sensor
TLE4998P3C
1
1.1
* * * * * * *
Overview
Features
* * * * * * * * * * *
PWM open-drain output signal 20-bit Digital Signal Processing Digital temperature compensation 12-bit overall resolution Operates within automotive temperature range Low drift of output signal over temperature and lifetime Programmable parameters stored in EEPROM with single bit error correction: PG-SSO-3-9x - PWM output frequency - Magnetic range and magnetic sensitivity (gain), polarity of the output slope - Offset - Bandwidth - Clamping levels - Customer temperature compensation coefficients - Memory lock Re-programmable until memory lock Supply voltage 4.5 - 5.5 V (4.1 - 16 V extended range) Operation between -200 mT and +200 mT within three ranges Reverse-polarity and overvoltage protection for all pins Output short-circuit protection On-board diagnostics (overvoltage, EEPROM error) Digital readout of the magnetic field and internal temperature in calibration mode Programming and operation of multiple sensors with common power supply Two-point calibration of magnetic transfer function without iteration steps High immunity against mechanical stress, EMC, ESD Package with two capacitors: 47nF (VDD to GND) and 4.7nF (OUT to GND)
Type TLE4998P3C
Marking 98P3C
Ordering Code SP000481486
Package PG-SSO-3-92
Data Sheet
5
Rev 1.1, 2009-09
TLE4998P3C
Overview
1.2
Target Applications
* Robust replacement of potentiometers - No mechanical abrasion - Resistant to humidity, temperature, pollution and vibration * Linear and angular position sensing in automotive applications such as pedal position, suspension control, valve or throttle position, headlight levelling, and steering angle * High-current sensing for battery management, motor control, and electronic fuses
1.3
Pin Configuration
Figure 1 shows the location of the Hall element in the chip and the distance between the Hall probe and surface of the package.
2.67
B
A
1.53
0.2 B
d
Center of sensitive area
Branded Side Hall-Probe
0.2 A
1
2
3
d: Distance chip to upper side of IC 0.3 0.05 mm
AEP03538
Figure 1 Table 1 Pin No. 1 2 3
TLE4998P3C Pin Configuration and Hall Cell Location Pin Definitions and Functions Symbol Function Supply voltage / programming interface Ground Output / programming interface
VDD GND OUT
Data Sheet
6
Rev 1.1, 2009-09
TLE4998P3C
General
2
2.1
General
Block Diagram
Figure 2 is a simplified block diagram.
VDD Interface Bias Supply EEPROM
A D
spinning H ALL
OUT
DSP
Temp. Sense
A D
PWM
GND ROM
Figure 2
Block Diagram
2.2
Functional Description
The linear Hall IC TLE4998P3C has been designed specifically to meet the requirements of highly accurate rotation and position detection, as well as for current measurement applications. Two capacitors are integrated on the lead frame, making this sensor especially suitable for applications with demanding EMC requirements. The sensor provides a digital PWM signal, which is ideally suited for direct decoding by any unit measuring a duty cycle of a rectangular signal (usually a timer/capture unit in a microcontroller). The output stage is an open-drain driver pulling the output pad to low only. Therefore, the high level must be obtained by an external pull-up resistor. This output type has the advantage that the receiver may use even a lower supply voltage (e.g. 3.3 V). In this case, the pull-up resistor must be connected to the given receiver supply.
Data Sheet
7
Rev 1.1, 2009-09
TLE4998P3C
General The IC is produced in BiCMOS technology with high voltage capability, also providing reverse polarity protection. Digital signal processing, using a 16-bit DSP architecture together with digital temperature compensation, guarantees excellent long-time stability as compared to analog compensation methods. While the overall resolution is 12 bits, some internal stages work with resolutions up to 20 bits. The PWM output frequency can be selected within the range of 122 Hz up to 1953 Hz.
2.3
Principle of Operation
* A magnetic flux is measured by a Hall-Effect cell * The output signal from the Hall-Effect cell is converted from Analog to Digital signals * The chopped Hall-Effect cell and continuous-time A/D conversion ensure a very low and stable magnetic offset * A programmable Low-Pass filter reduces the noise * The temperature is measured and A/D converted, too * Temperature compensation is done digitally using a second order function * Digital processing of output value is based on zero field and sensitivity value * The output value range can be clamped by digital limiters * The final output value is transferred in a rectangular, periodic signal with varying duty cycle (Pulse Width Modulation) * The duty cycle is proportional to the 12-bit output value
Data Sheet
8
Rev 1.1, 2009-09
TLE4998P3C
General
2.4
Transfer Functions
The examples in Figure 3 show how different magnetic field ranges can be mapped to the desired output value ranges. * Polarity mode: - Bipolar: Magnetic fields can be measured in both orientations. The limit points do not necessarily have to be symmetrical around the zero field point
- Unipolar: Only North- or South-oriented magnetic fields are measured
* Inversion: The gain values can be set positive or negative.
B (mT) 50
duty (%)
B (mT)
duty (%)
B (mT)
duty (%) 100
100 100
100 200
0
0
0
0 V OUT
0
0 V OUT
-50
-100
-200
Example 1: - Bipolar
Example 2: - Unipolar - Big offset
Example 3: - Bipolar - Inverted (neg. gain)
Figure 3
Examples of Operation
Data Sheet
9
Rev 1.1, 2009-09
TLE4998P3C
Maximum Ratings
3
Table 2 Parameter
Maximum Ratings
Absolute Maximum Ratings Symbol Limit Values min. max. 150 1701) 18 15 184) unlimited 8 C C V mA mA V T kV According HBM JESD22-A114-B 5)
2)
Unit
Notes
Storage temperature Junction temperature Voltage on VDD pin with respect to ground Supply current @ overvoltage VDD max. Reverse supply current @ VDD min.
TST TJ VDD IDDov IDDrev
- 40 - 40 -18 -1 -13) -
Voltage on output pin with OUT respect to ground Magnetic field ESD protection
1) 2)
BMAX VESD
For limited time of 96 h. Depends on customer temperature lifetime cycles. Please ask Infineon for support Higher voltage stress than absolute maximum rating, e.g. 150% in latch-up tests is not applicable. In such cases, Rseries 100 for current limitation is required IDD can exceed 10 mA when the voltage on OUT is pulled below -1 V (-5 V at room temperature)
3) 4) 5)
VDD = 5 V, open drain permanent low, for max. 10 min
100 pF and 1.5 k
Note: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Data Sheet
10
Rev 1.1, 2009-09
TLE4998P3C
Operating Range
4
Operating Range
The following operating conditions must not be exceeded in order to ensure correct operation of the TLE4998P3C. All parameters specified in the following sections refer to these operating conditions, unless otherwise indicated.
Table 3 Parameter
Operating Range Symbol Limit Values min. max. 5.5 162) 18 5 125 1504) V V V k mA C for 5000 h for 1000 h not additive Extended Range VDD 4.5 4.11) 1 0 - 40 Unit Notes
Supply voltage
Output pull-up voltage3) OUT Load resistance3) Output current3) Junction temperature
1) 2) 3) 4)
RL IOUT TJ
For reduced output accuracy For supply voltages > 12V, a series resistance Rseries 100 is recommended Output protocol characteristics depend on these parameters, RL must be according to max. output current For reduced magnetic accuracy; extended limits are taken for characteristics
Note: Keeping signal levels within the limits specified in this table ensures operation without overload conditions.
Data Sheet
11
Rev 1.1, 2009-09
TLE4998P3C
Electrical, Thermal and Magnetic Parameters
5
Table 4 Parameter
Electrical, Thermal and Magnetic Parameters
Electrical Characteristics Symbol Limit Values min. typ. max. 122 0 3 19 2 47 4.7 6 95 100 8 Unit Notes nF nF % mA mA VOUT = 5V, max. 10 minutes Ceramic Ceramic Programmable1) Programmable
VDD-GND capacitor OUT-GND capacitor PWM output frequency Output duty cycle range Supply current Output current @ OUT shorted to supply lines Thermal resistance Power-on time2) Power-on reset level Output impedance Output fall time Output rise time Output low saturation voltage Output noise (rms)
1) 2)
CVDD CL fPWM DYPWM IDD IOUTsh RthJA RthJC tPon VDDpon ZOUT tfall trise
VOUTsat OUTnoise
1953 Hz
190 41 0.7 15 3.6 30 20 0.3 0.2 1 2 20 4 44 4 0.6 0.4 2.5
K/W Junction to Air K/W Junction to Case ms V k s s V
3)
DYPWM 5% DYPWM 1%
VOUT 4.5 V to 0.5 V4) VOUT 0.5 V to 4.5 V4)5) IOUTsink = 5 mA IOUTsink = 2.2 mA
LSB12 6)
Internal RC oscillator variation +/- 20% Response time to set up output duty cycle at power-on when a constant field is applied (fPWM=1953Hz). The first value given has a 5% error, the second value has a 1% error Output impedance is measured VOUT/IOUT (VOUT=18V ... 4.2V) at VDD = 5V, open-drain high state For VDD = 5 V, RL = 2.2 k, CL = 4.7 nF (CL in package), at room temperature, not including capacitor tolerance or influence of external circuitry
3) 4)
Data Sheet
12
Rev 1.1, 2009-09
TLE4998P3C
Electrical, Thermal and Magnetic Parameters
5)
Depends on external RL and additional CL
V OUT
*)
tPWM tlow thigh
VD D 90% V D D
DY = thigh/tPWM
10% V D D V OUTsat
tfall
6)
trise
t
*)
RL to V DD assumed
Range 100 mT, Gain 2.23, internal LP filter 244 Hz, B = 0mT, T = 25C
Data Sheet
13
Rev 1.1, 2009-09
TLE4998P3C
Electrical, Thermal and Magnetic Parameters Calculation of the Junction Temperature The total power dissipation PTOT of the chip increases its temperature above the ambient temperature. The power multiplied by the total thermal resistance RthJA (Junction to Ambient) leads to the final junction temperature. RthJA is the sum of the addition of the values of the two components Junction to Case and Case to Ambient.
RthJA = RthJC + RthCA TJ = TA + T T = RthJA x PTOT = RthJA x ( VDD x IDD + VOUT x IOUT )
Example (assuming no load on Vout): - VDD = 5 V - IDD = 8 mA - T = 190 [K/W] x (5 [V] x 0.008 [A] + 0 [VA] ) = 7.6 K
IDD , IOUT > 0, if direction is into IC
For moulded sensors, the calculation with RthJC is more adequate. Magnetic Parameters Table 5 Parameter Sensitivity Sensitivity drift Magnetic field range Integral nonlinearity Magnetic offset Magnetic offset drift Magnetic hysteresis
1) 2) 3) 4)
Magnetic Characteristics Symbol Limit Values min. typ. 80 max. 6 150 %/mT ppm/ C mT %MFR T T
2) 3)
Unit
Notes
S1)
S
0.2 50 -
See Figure 4 Programmable 5)
6)8) 7)8)
MFR Inl BOS
BOS
1004) 200 0.05 1 0.1 400 5 10
T / C Error band 8)
9)
BHYS
Defined as DYPWM / B Programmable in steps of 0.024% For any 1st and 2nd order polynomial, coefficient within definition in chapter 8. Valid for characterization at 0h This range is also used for temperature and offset pre-calibration of the IC
Data Sheet
14
Rev 1.1, 2009-09
TLE4998P3C
Electrical, Thermal and Magnetic Parameters
5) 6) 7) 8) 9)
Depending on offset and gain settings, the output may already be saturated at lower fields Gain setup is 1.0 In operating temperature range and over lifetime Measured at 100 mT range Measured in 100 mT range, Gain = 1, room temperature
S ~ S(T)/S 0-1
max. pos. TC-error TCmax = S/T S0
0 Tmin T0 T max
Tj
max. neg. TC-error TCmin = S/T
Figure 4
Sensitivity drift
Data Sheet
15
Rev 1.1, 2009-09
TLE4998P3C
Signal Processing
6
Signal Processing
The flow diagram in Figure 5 shows the data-processing algorithm.
Range Hall Sensor Temperature Sensor
A D
LP
Gain +
Limiter
(Clam p)
X
X
Protocol Generation
out
Offset TC 2
X X
A D
+ TC 1
1
X
+
Stored in EEPROM Memory
-T0
Temperature Compensation
Figure 5
Signal Processing Flow
Magnetic Field Path * The analog output signal of the chopped Hall-effect cell is converted to a digital signal in the continuous-time A/D converter. The range of the chopped A/D converter can be set in several steps (see Table 6). This gives a suitable level for the A/D converter * After the A/D conversion, a digital-low pass filter reduces the band width (Table 10). * A multiplier amplifies the value depending on the gain (see Table 8) and temperature compensation settings * The offset value is added (see Table 9) * A limiter reduces the resulting signal to 12 bits and feeds the Protocol Generation stage Temperature Compensation (Details are given in Chapter 8) * The output signal of the temperature cell is also A/D converted * The temperature is normalized by subtraction of the reference temperature T0 value (zero point of the quadratic function)
Data Sheet 16 Rev 1.1, 2009-09
TLE4998P3C
Signal Processing * The linear path is multiplied by the TC1 value * In the quadratic path, the temperature difference to T0 is squared and multiplied by the TC2 value * Both path outputs are added together and multiplied by the Gain value from the EEPROM
6.1
Magnetic Field Ranges
The working range of the magnetic field defines the input range of the A/D converter. It is always symmetrical around the zero field point. Any two points in the magnetic field range can be selected to be the end points of the output value. The output value is represented wihtin the range between the two points. In the case of fields higher than the range values, the output signal may be distorted. The range must be set before the calibration of offset and gain.
Table 6 Range Low Mid High
1)
Range Setting Range in mT1) 50 100 200 Parameter R 3 1 0
Ranges do not have a guaranteed absolute accuracy. The temperature pre-calibration is performed in the mid range (100 mT). Setting R = 2 is not used, internally changed to R = 1
Table 7 Parameter Register size
Range Symbol Limit Values min. max. 2 bit Unit Notes
R
Data Sheet
17
Rev 1.1, 2009-09
TLE4998P3C
Signal Processing
6.2
Gain Setting
The sensitivity is defined by the range and the gain setting. The output of the A/D converter is multiplied by the Gain value. Table 8 Parameter Register size Gain range
1)
Gain Symbol Limit Values min. max. 15 - 4.0 3.9998 244.14 bit ppm Unsigned integer value
1)2)
Unit
Notes
G Gain
Gain quantization steps Gain
Corresponds to 1 / 4096
For Gain values between - 0.5 and + 0.5, the numerical accuracy decreases. To obtain a flatter output curve, a higher range setting should be selected A Gain value of +1.0 corresponds to typical 0.8%/mT sensitivity (100 mT range, not guaranteed). It is crucial to do a final calibration of each IC within the application using the Gain/DYOS value
2)
The Gain value can be calculated by
:
( G - 16384 ) Gain = ----------------------------4096
6.3
Table 9 Parameter
Offset Setting
Offset Symbol Limit Values min. max. Unit bit % % Notes Unsigned integer value Virtual DYPWM 1) 100% / 4096
The offset value corresponds to an output value with zero field at the sensor.
Register size Offset range Offset quantization steps
1)
OS DYOS
DYOS
15 -400 399 0.024
Infineon pre-calibrates the samples at zero field to 50% duty cycle (100 mT range), but does not guarantee the value. Therefore it is crucial to do a final calibration of each IC within the application
The offset value can be calculated by: --------------------------------DY OS = ( OS - 16384 ) x 100 4096
Data Sheet
18
Rev 1.1, 2009-09
TLE4998P3C
Signal Processing
6.4
DSP Input Low Pass Filter
A digital low-pass filter is placed between the Hall A/D converter and the DSP an can be to reduce the noise level. The low-pass filter has a constant DC amplification of 0 dB (gain of 1), which means that its setting has no influence on the internal Hall A/D converter value. The bandwidth can be set in 8 steps. Table 10 0 1 2 3 4 5 6 7
1)
Low-Pass Filter Setting Cutoff frequency in Hz (at -3 dB point)1) 80 240 440 640 860 1100 1390 off
Note: Parameter LP
As this is a digital filter running with an RC-based oscillator, the cutoff frequency may vary within 20%
Table 11 Parameter Register size
Low-Pass Filter Symbol Limit Values min. max. 3 - 20 + 20 bit % Unit Notes
Corner frequency variation
LP f
Note: In range 7 (filter off), the output noise increases.
Data Sheet
19
Rev 1.1, 2009-09
TLE4998P3C
Signal Processing Figure 6 shows the filter characteristics as a magnitude plot (highest setting is marked). The "off" position would be a flat 0 dB line. The update rate after the low-pass filter is 16 kHz.
0
-1
Magnitude (dB)
-2
-3 -4
-5
-6 101
102
103
Frequency (Hz)
Figure 6 DSP Input Filter (Magnitude Plot)
Data Sheet
20
Rev 1.1, 2009-09
TLE4998P3C
Signal Processing
6.5
Clamping
The clamping function is useful for splitting the output voltage range into operating range and error ranges. If the magnetic field is outside the selected measurement range, the output value OUT is limited to the clamping values. Any value in the error range is interpreted as an error by the sensor counterpart. Table 12 Parameter Register size Clamping Symbol Limit Values min. max. bit % % %
1) 1) 2) 3)
Unit
Notes
2x7 CL,CH Clamping duty cy. low CYCLPWM 0 99.2 Clamping duty cy. high CYCHPWM 0.76 100 Clamping quantization CYCxPWM 0.78 steps
1) 2) 3)
For CL = 0 and CH = 127 the clamping function is disabled CYCLPWM< CYCHPWM mandatory Quantization starts for CL at 0% and for CH at 100%
The clamping values are calculated by: Clamping duty cycle low (deactivated if CL=0): ----------------CY CLPWM = CL 32 4095 Clamping duty cycle high (deactivated if CH=127): --------------------------------------CY CHPWM = ( CH + 1 ) 32 - 1 4095
Data Sheet
21
Rev 1.1, 2009-09
TLE4998P3C
Signal Processing Figure 7 shows an example in which the magnetic field range between Bmin and Bmax is mapped to duty cycles between 16% and 84%.
DYPWM (%) 100
80 60 40 20
Error range
DY CHPWM
Operating range
Error range 0 B min
Figure 7 Clamping example
DY CLPWM
Bmax
B (mT)
Note: The clamping high value must be above the low value.
Data Sheet
22
Rev 1.1, 2009-09
TLE4998P3C
Signal Processing
6.6
PWM Output Fequency Setup
This enables a setup of different PWM output frequencies, even if the internal RC oscillator varies by 20%. Table 13 Parameter Register size Predivider Setting Symbol Limit Values min. max. 4 122 1953 bit Hz Predivider OSCClk ... oscillator clock Unit Notes
Prediv
PWM output frequency fPWM
The nominal unit time is calculated by:
fPW M = OSC Clk / (Prediv + 1) OSC Clk = 1953 Hz 20%
Data Sheet
23
Rev 1.1, 2009-09
TLE4998P3C
Error Detection
7
Error Detection
Different error cases can be detected by the On-Board-Diagnostics (OBD) and reported to the microcontroller. The OBD is useful only when the clamping function is enabled.
7.1
Voltages Outside the Operating Range
The output signals error conditions if VDD crosses the overvoltage threshold level. Table 14 Parameter Overvoltage threshold Output duty cycle @ overvoltage
1)
Overvoltage Symbol Limit Values min. typ. max. 18.35 V % Unit Notes
VDDov 16.65 17.5 CYPWMov 100 1) -
Output stays in "off" state (high ohmic)
7.2
EEPROM Error Correction
The parity method is able to correct one single bit in one EEPROM line. One other singlebit error in another line can also be detected. As this situation is not correctable, this status is signalled at the output pin by clamping the output value to CYPWM = 100%. Table 15 Parameter Output duty cycle @ EEPROM error
1)
EEPROM Error Signalling Symbol Limit Values min. max. %
1)
Unit
Notes
CYPWMerr 100
Output stays in "off" state (high ohmic)
Data Sheet
24
Rev 1.1, 2009-09
TLE4998P3C
Temperature Compensation
8
Temperature Compensation
The magnetic field strength of a magnet depends on the temperature. This material constant is specific to different magnet types. Therefore, the TLE4998P3C offers a second-order temperature compensation polynomial, by which the Hall signal output is multiplied in the DSP. There are three parameters for the compensation: * Reference temperature T0 * A linear part (1st order) TC1 * A quadratic part (2nd order) TC2 The following formula describes the sensitivity dependent on the temperature in relation to the sensitivity at the reference temperature T0:
S TC ( T ) = 1 + TC 1 x ( T - T 0 ) + TC 2 x ( T - T0 )
2
For more information, see also the signal-processing flow in Figure 5. The full temperature compensation of the complete system is done in two steps: 1. Pre-calibration in the Infineon final test The parameters TC1, TC2, T0 are set to maximally flat temperature characteristics regarding the Hall probe and internal analog processing parts. 2. Overall system calibration The typical coefficients TC1, TC2, T0 of the magnetic circuitry are programmed. This can be done deterministically, as the algorithm of the DSP is fully reproducible. The final setting of the TC1, TC2, T0 values depend on the pre-calibrated values. Table 16 Parameter Register size TC1 1st order coefficient TC1 Quantization steps of TC1 Register size TC2 2nd order coefficient TC2 Quantization steps of TC2 Reference temp. Quantization steps of T0
1)
Temperature Compensation Symbol Limit Values Unit min. max. 9 15.26 -4 - 48 1 8 4 0.119 64 bit ppm/ C ppm/ C bit ppm/ C ppm/ C C C
3)
Notes Unsigned integer values
1)
TL TC1 qTC1 TQ TC2 qTC2 T0 qT0
-
-1000 2500
Unsigned integer values
2)
Relative range to Infineon TC1 temperature pre-calibration, the maximum adjustable range is limited by the register-size and depends on specific pre-calibrated TL setting, full adjustable range: -2441 to +5355 ppm/C
Data Sheet
25
Rev 1.1, 2009-09
TLE4998P3C
Temperature Compensation
2)
Relative range to Infineon TC2 temperature pre-calibration, the maximum adjustable range is limited by the register-size and depends on specific pre-calibrated TQ setting, full adjustable range: -15 to +15 ppm/C2 Handled by algorithm only (see Application Note)
3)
8.1
Parameter Calculation
The parameters TC1 and TC2 may be calculated by:
TL - 160 TC 1 = --------------------- x 1000000 65536 TQ - 128 TC 2 = ----------------------- x 1000000
8388608 The digital output for a given field BIN at a specific temperature can then be calculated by: B
IN DY OUT = 2 ------------ x S TC x S TCHall x S0 x 4096 + DY OS
B FSR
BFSR is the full range magnetic field. It is dependent on the range setting (e.g 100 mT). S0 is the nominal sensitivity of the Hall probe times the Gain factor set in the EEPROM. STC is the temperature-dependent sensitivity factor calculated by the DSP. STCHall is the temperature behavior of the Hall probe. The pre-calibration at Infineon is performed such that the following condition is met:
S TC ( T J - T 0 ) x S TCHall ( T J ) 1
Within the application, an additional factor BIN(T) / BIN(T0) will be given due to the magnetic system. STC then needs to be modified to STCnew so that the following condition is satisfied:
B IN ( T ) -------------------- x S TCnew ( T ) x S TCHall ( T ) S TC ( T ) x S TCHall ( T ) 1 B IN ( T 0 )
Therefore, the new sensitivity parameters STCnew can be calculated from the precalibrated setup STC using the relationship:
B IN ( T ) -------------------- x S TCnew ( T ) S TC ( T ) B IN ( T 0 )
Data Sheet
26
Rev 1.1, 2009-09
TLE4998P3C
Calibration
9
Calibration
For the calibration of the sensor, a special hardware interface to a PC is required. All calibration and setting bits can be temporarily written into a Random Access Memory (RAM). This allows the EEPROM to remain untouched during the entire calibration process, since the number of the EEPROM programming cycles is limited. Therefore, this temporary setup (using the RAM only) does not stress the EEPROM. The digital signal processing is completely deterministic. This allows a two-point calibration in one step without iterations. After measuring the Hall output signal for the two end points, the signal processing parameters Gain and Offset can be calculated. Table 17 Parameter Temperature at calibration Two-point calibration accuracy Calibration Characteristics Symbol Limit Values min. max. 30 0.2 0.2 C % % Position 1 Position 2 10 Unit Notes
TCAL
CYCAL1 -0.2 CYCAL2 -0.2
Note: Depending on the application and external instrumentation setup, the accuracy of the two-point calibration can be improved.
Data Sheet
27
Rev 1.1, 2009-09
TLE4998P3C
Calibration
9.1
Calibration Data Memory
When the MEMLOCK bits are programmed (two redundant bits), the memory content is frozen and may no longer be changed. Furthermore, the programming interface is locked out and the chip remains in the application mode only. This prevents accidental programming due to environmental influences.
Column Parity Bits
Row Parity Bits
User-Calibration Bits
Pre-Calibration Bits
Figure 8
EEPROM Map
A matrix parity architecture allows automatic correction of any single-bit error. Each row is protected by a row parity bit. The sum of bits set including this bit must be an odd number (ODD PARITY). Each column is additionally protected by a column parity bit. Each bit in the even positions (0, 2, etc.) of all lines must sum up to an even number (EVEN PARITY), and each bit in the odd positions (1,3, etc.) must have an odd sum (ODD PARITY). The parity column must have an even sum (EVEN PARITY). This mechanism of different parity calculations also protects against many block errors such as erasing a full line or even the whole EEPROM. When modifying the application bits (such as Gain, Offset, TC, etc.) the parity bits must be updated. As for the column bits, the pre-calibration area must be read out and considered for correct parity generation as well. Note: A specific programming algorithm must be followed to ensure data retention. A detailed separate programming specification is available on request.
Data Sheet
28
Rev 1.1, 2009-09
TLE4998P3C
Calibration Table 18 Parameter Number of EEPROM programming cycles Ambient temperature at programming Programming time Calibration memory Error Correction
1) 2)
Programming Characteristics Symbol Limit Values min. max. 10 30 150 26 Cycles1) Programming allowed only at start of lifetime C ms bit bit For complete memory 2) All active EEPROM bits All parity EEPROM bits Unit Notes
NPRG TPRG tPRG
-
10 100
1 cycle is the simultaneous change of 1 bit Depending on clock frequency at VDD, write pulse 10 ms 1%, erase pulse 80 ms 1%
9.2
Programming Interface
The VDD pin and the OUT pin are used as a two-wire interface to transmit the EEPROM data to and from the sensor. This allows * Communication with high data reliability, parity protected * The bus-type connection of several sensors and separate programming via the OUT pin
9.3
Data transfer protocol
The data transfer protocol is described in a separate document (User Programming Description), available on request.
9.4
Programming of sensors with common supply lines
In many automotive applications, two sensors are used to measure the same parameter. This redundancy allows the operation to continue in an emergency mode. If both sensors use the same power supply lines, they can be programmed together in parallel.
Data Sheet
29
Rev 1.1, 2009-09
TLE4998P3C
Application Circuit
10
Application Circuit
Figure 9 shows the connection of multiple sensors to a microcontroller.
Sensor Module
Voltage Supply Sensor
Voltage Supply C
ECU Module
VDD
VDD
C
Vdd
2k2 50
TLE out 4998P3C
GND
OUT1
CCin1
1n GND
VGND CCin2
2k2
V DD
TLE out 4998P3C
GND
OUT2
50
optional
1n
Figure 9
Application Circuit
Note: For calibration and programming, the interface has to be connected directly to the output pin The application circuit shown must be regarded as only an example that will need to be adapted to meet the requirements of other specific applications.
Data Sheet
30
Rev 1.1, 2009-09
TLE4998P3C
Package Outlines
11
Package Outlines
B 1 x 45 1
0.1 MAX.
5.34 0.05 5.16 0.08 1.9 MAX.
0.2 2A
3.38 0.06
1.905 B
1.905 B
3.710.08
1-0.1 0.25 0.05
7
0.65 0.1 (0.25)
7.070.1
0.2 B 0.2 B
(2.68)
5.670.1
0.4 0.05 1.670.05
1 MAX.1)
2x
(2.2)
A
A
7 2
5.34 0.05 5.16 0.08 0.9 0.05 0.2 B 0.2 B 3x
1.2 0.05
1.655
1
2
3
2 x 1.655 = 3.31 A-A
(1.75)
15 2
(0.52)
B-B 7 45 1
(0.9)
(1.75) (4.35)
Capacitor (1.75)
C-C
Burr MAX 0.15 Burr MAX 0.15
B 0.2
5.16 0.08
Burr MAX 1.1
12.7 1
2C
(14.8) (Useable Length) 23.8 0.5
38 MAX.
Burr MAX 1.1 18 0.5 6 0.5
C 2.2 0.05
9 +0.75 -0.5
C
0.870.05
0.1
(8.17)
0.6 MAX. 1.9 MAX.
0.2 +0.04 0.35 0.05
7
A
6.35 0.4 12.7 0.3 Total tolerance at 10 pitches 1 1) No solder function area
4 0.3
0.25 -0.15 0.39 0.1
P/PG-SSO-3-9x-PO V07
Figure 10
Data Sheet
PG-SSO-3-92 (Plastic Green Single Small Outline Package)
31 Rev 1.1, 2009-09
1-1
Adhesive Tape Tape
www.infineon.com
Published by Infineon Technologies AG


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